iverilog-32bit

Verilog simulation and synthesis tool (32bit)

Details

Homepage:

https://steveicarus.github.io/iverilog/

License:

GPL-2.0-or-later, LGPL-2.1-or-later

Maintainer:

Orphaned

Repository:

void-repo-multilib

Built at:

2023-11-13 09:51

Installed size:

58.05 KiB

Popularity:

No usages in 100 reports

Depending on:

• glibc-32bit>=2.36_{_1}
• libgcc-32bit>=4.4.0_{_1}
• libreadline8-32bit>=8.0_{_1}
• libstdc++-32bit>=4.4.0_{_1}
• zlib-32bit>=1.2.3_{_1}