yosys

Verilog RTL Synthesis Suite

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Build for armv7l-glibc, version 0.36_{_1}. Builds for all architectures.

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Details

Homepage:

https://yosyshq.net/yosys/

License:

ISC, MIT

Maintainer:

Orphaned

Built at:

2023-12-18 02:07

Source files:

https://github.com/cliffordwolf/yosys/archive/yosys-0.36.tar.gz

Installed size:

17.15 MiB

Popularity:

2 usages in 88 reports

Depending on:

• berkeley-abc
• glibc>=2.36_{_1}
• graphviz
• libffi>=3.3_{_1}
• libgcc>=4.4.0_{_1}
• libreadline8>=8.0_{_1}
• libstdc++>=4.4.0_{_1}
• tcl>=8.6.0_{_1}
• xdot
• zlib>=1.2.3_{_1}