yosys

Verilog RTL Synthesis Suite

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Build for armv6l-glibc, version 0.47_{_1}. Builds for all architectures.

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Details

Homepage:

https://yosyshq.net/yosys/

License:

ISC, MIT

Maintainer:

Orphaned

Built at:

2024-11-30 22:51

Installed size:

28.12 MiB

Popularity:

2 usages in 119 reports

Depending on:

• glibc>=2.39_{_1}
• graphviz
• libffi>=3.3_{_1}
• libgcc>=4.4.0_{_1}
• libreadline8>=8.0_{_1}
• libstdc++>=4.4.0_{_1}
• tcl>=8.6.0_{_1}
• xdot
• yosys-abc
• zlib>=1.2.3_{_1}